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Trusted Irix /B 4.0.4
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Trusted-Irix B-4.0.1.iso
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eoe1.idb
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IP4.h.z
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IP4.h
Wrap
C/C++ Source or Header
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1992-04-03
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9KB
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268 lines
/**************************************************************************
* *
* Copyright (C) 1987, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
#ident "$Revision: 1.31 $"
#ifndef __SYS_IP4_H__
#define __SYS_IP4_H__
#if !LOCORE
#include "sys/types.h"
#endif /* !LOCORE */
/*
* IP4.h -- cpu board specific defines for IP4
*/
/*
* CPU Board addresses
*/
#define VME_IACK 0x1df00002 /* VME interrupt acknowledge */
#define SOUND_DAT_ADDR 0xbf600000 /* SAA1099 stereo sound generator */
#define SOUND_CMD_ADDR 0xbf600010
#define SYSID_ADDR 0xbf800001 /* System ID prom/Coprocessor present */
#define VME_ISR 0x1f840003 /* interrupt status */
#define VME_IMR 0x1f84000b /* interrupt mask */
#define CPU_CONFIG 0x1f880002 /* Control and status register (h) */
#define SCSI_DMALO_ADDR 0xbf900002 /* Low address register (h)*/
#define SCSI_DMAHI_ADDR 0xbf920002 /* High address register array (16h)*/
#define SCSI_FLUSH_ADDR 0xbf940000 /* DMA flush bytes to memory */
#define LIO_ISR_ADDR 0x1f980003 /* Local IO interrupt status (b) */
#define SWTCH_ADDR 0x1f9a0002 /* switches (h) */
#define TIM1_ACK_ADDR 0xbfa00000 /* clear T1 interrupt (b) */
#define TIM0_ACK_ADDR 0xbfa20000 /* clear T0 interrupt (b) */
#define SBE_ADDR 0x1fa40000 /* system bus error address (w)*/
#define VME_RMW_ADDR 0xbfa60000 /* VME RMW toggle */
#define SCSI_RDY_ADDR 0xbfa80000 /* Deactivate master reset on chip */
#define SCSI_INIT_ADDR 0xbfa80004 /* Activate master reset on chip */
#define PAR_CL_LAN_ADDR 0x1faa0000 /* Clear LAN Access bit (b) */
#define PAR_CL_DMA 0x1faa0001 /* Clear DMA Access bit (b) */
#define PAR_CL_CPU 0x1faa0002 /* Clear CPU Access bit (b) */
#define PAR_CL_VME 0x1faa0003 /* Clear VME Access bit (b) */
#define PAR_ERR_ADDR 0x1faa0005 /* Parity error register (b) */
#define ID_ADDR 0xbfae0000 /* ID prom address */
#define PT_CLOCK_ADDR 0xbfb40000 /* Timer chip */
#define SCSI0_ADDR 0xbfb00001 /* SCSI WD33C93 address register */
#define SCSI1_ADDR 0xbfb00101 /* SCSI WD33C93 data register */
#define DUART0_ADDR 0xbfb80000 /* Keyboard/mouse DUART */
#define DUART1_ADDR 0xbfb80004 /* Second DUART */
#define DUART2_ADDR 0xbfb80008 /* Third DUART */
#define NVRAM_ADDR 0xbfbc0000 /* Non-volatile RAM address */
#define RT_CLOCK_ADDR (NVRAM_ADDR+(0x7ff<<2))
/* Time of day clock address */
/*
* Configuration register bits
*/
#define CONFIG_LEDS 0x001f /* LED bits */
#define CONFIG_S01 0x0040 /* Enable drive for serial ports 0,1 */
#define CONFIG_S23 0x0080 /* Enable drive for serial ports 2,3 */
#define CONFIG_MAIL 0x0100 /* Enable mailbox interrupts */
#define CONFIG_INIT 0x0200 /* Drive VME SYSRESET (will reset CPU)*/
#define CONFIG_ENPAR 0x0400 /* Enable parity */
#define CONFIG_SLAVE 0x0800 /* Allow Slave accesses to board */
#define CONFIG_ARB 0x1000 /* Enable VME arbiter function */
#define CONFIG_BADPAR 0x2000 /* Write bad parity */
#define CONFIG_DOG 0x4000 /* Enable watchdog timeout */
#define CONFIG_AUX2 0x8000 /* Unused */
/*
* The led bits use the top bit to indicate if the FPC is installed.
*/
#define LED_REG CPU_CONFIG
#define LED_MASK CONFIG_LEDS /* led bits */
#define LED_CP 0x20
#define NVSTATE_ADDR 192 /* Byte that indicates if nv valid */
/*
* System ID prom/Coprocessor present bits
*/
#define SYSID_CPMSK 0x02 /* Mask for bit for CP1 indication*/
/*
* Local I/O interrupt status bits
*/
#define LIO_D0 0x01 /* Duart 0 interrupt */
#define LIO_D1 0x02 /* Duart 1 interrupt */
#define LIO_D2 0x04 /* Duart 2 interrupt */
#define LIO_SCSI 0x10 /* SCSI interrupt */
#define LIO_MAIL 0x40 /* VME mailbox interrupt */
#define LIO_AC 0x80 /* VME AC fail interrupt */
/*
* Switch bits
*/
#define S1MASK 0x00ff /* software configuration register */
#define S2MASK 0xff00 /* high byte of VME A32 board mem adr */
#define S2CPUNO 0x0c00 /* CPU number */
/*
* Parity error register bits
*/
#define PAR_LAN 0x01 /* LAN generated error */
#define PAR_DMA 0x02 /* DMA generated error */
#define PAR_CPU 0x04 /* CPU generated error */
#define PAR_VME 0x08 /* VME generated error */
#define PAR_B3 0x10 /* Parity error in byte 3 */
#define PAR_B2 0x20 /* Parity error in byte 2 */
#define PAR_B1 0x40 /* Parity error in byte 1 */
#define PAR_B0 0x80 /* Parity error in byte 0 */
/*
* SCSI Control
*/
#define SCSI_TO_MEM 0x80 /* transfer in */
/*
* VME I/O space defines
*/
#define VME_A16NPBASE 0x1d100000 /* a16 non-privileged address sp */
#define VME_A16NPSIZE 0x00010000 /* size */
#define VME_A16SBASE 0x1d000000 /* a16 supervisor address sp */
#define VME_A16SSIZE 0x00010000 /* size */
#define VME_A24NPBASE 0x1e000000 /* a24 non-privileged address sp */
#define VME_A24NPSIZE 0x01000000 /* size */
#define VME_A24SBASE 0x1c000000 /* a24 supervisor address sp */
#define VME_A24SSIZE 0x01000000 /* size */
#define VME_A32NPBASE 0x10000000 /* a32 non-privileged address sp */
#define VME_A32NPSIZE 0x0c000000 /* size */
#define VME_2A32NPBASE 0x20000000 /* 2nd a32 non-privileged address sp */
#define VME_A32SBASE 0x0 /* a32 supervisor address sp */
#define VME_A32SSIZE 0x0 /* size */
#define vme_adapter(addr) 0 /* only 1 VME adapter */
/*
* non-volatile ram addresses
* NOTE: everything must fit within 2kb for the Smart Watch. Each
* byte at a longword boundary.
* ALSO NOTE: we need to reserve the last 2 bytes of NV RAM for a checksum
* and for use in setting the real-time clock.
*/
#define NVLEN_MAX (2046 * 4) /* last 2 bytes reserved */
#define NVOFF_BASE 0
/*
* state maintains the current validity of the tod clock and
* non-volatile ram
* see NVSTATE_* definitions below
*/
#define NVOFF_STATE (NVOFF_BASE)
#define NVLEN_STATE 1
/*
* netaddr is used by network software to determine the internet
* address, it should be a string containing the appropriate
* network address in "." format
*/
#define NVOFF_NETADDR (NVOFF_STATE+(NVLEN_STATE*4))
#define NVLEN_NETADDR 16
/*
* lbaud/rbaud are the initial baud rates for the duart
* (e.g. "9600")
*/
#define NVOFF_LBAUD (NVOFF_NETADDR+(NVLEN_NETADDR*4))
#define NVLEN_LBAUD 5
#define NVOFF_RBAUD (NVOFF_LBAUD+(NVLEN_LBAUD*4))
#define NVLEN_RBAUD 5
/*
* bootfile is the initial program loaded on an autoboot
* (e.g. "bfs(0)mipsboot_le")
*/
#define NVOFF_BOOTFILE (NVOFF_RBAUD+(NVLEN_RBAUD*4))
#define NVLEN_BOOTFILE 50
/*
* bootmode controls autoboots/warm starts/command mode on reset
* "a" => autoboot on reset
* "w" => warm start if restart block correct, else autoboot
* anything else cause entry to command mode
*/
#define NVOFF_BOOTMODE (NVOFF_BOOTFILE+(NVLEN_BOOTFILE*4))
#define NVLEN_BOOTMODE 1
/*
* console controls what consoles are enabled at power-up
* 'a' indicates "all" consoles
* 'r' indicates both local and remote uarts
* anything else indicates only local uart
*/
#define NVOFF_CONSOLE (NVOFF_BOOTMODE+(NVLEN_BOOTMODE*4))
#define NVLEN_CONSOLE 1
/*
* failcode is used by the power-on diagnostics to save a failure
* code for use by service techs
*/
#define NVOFF_FAILCODE (NVOFF_CONSOLE+(NVLEN_CONSOLE*4))
#define NVLEN_FAILCODE 1
/*
* root identifies the disk partition that the root device will reside on.
*/
#define NVOFF_ROOT (NVOFF_FAILCODE+(NVLEN_FAILCODE*4))
#define NVLEN_ROOT 20
/*
* keybd indicates the type of keyboard that is attached
*/
#define NVOFF_KEYBD (NVOFF_ROOT+(NVLEN_ROOT*4))
#define NVLEN_KEYBD 10
#define NVOFF_MONITOR (NVOFF_KEYBD+(NVLEN_KEYBD*4))
#define NVLEN_MONITOR 4
#define NVOFF_SYNC_ON_GREEN (NVOFF_MONITOR+(NVLEN_MONITOR*4))
#define NVLEN_SYNC_ON_GREEN 1
#define NVOFF_DISKLESS (NVOFF_SYNC_ON_GREEN+(NVLEN_SYNC_ON_GREEN*4))
#define NVLEN_DISKLESS 1
#define NVLEN_TOTAL (NVOFF_DISKLESS+(NVLEN_DISKLESS*4))
#if NVLEN_TOTAL > NVLEN_MAX
# include "error -- non-volatile ram overflow"
#endif
/*
* checksum is used by the power-on diagnostics to check the validity
* of the Non-Volatile RAM contents. let's put it at end of nvram.
*/
#define NVOFF_CHECKSUM NVLEN_MAX
#define NVLEN_CHECKSUM 1
#define NVCHECKSUM_ADDR (NVRAM_ADDR + NVOFF_CHECKSUM)
#define NVCHECKSUM_K1ADDR PHYS_TO_K1(NVCHECKSUM_ADDR)
#ifdef LANGUAGE_C
typedef struct scuzzy {
u_char *d_addr; /* address register */
u_char *d_data; /* data register */
unsigned char d_initflags; /* initial flags for d_flags */
unsigned char d_clock; /* value for clock register on WD chip */
} scuzzy_t;
#endif /* LANGUAGE_C */
#define dcache_wb(X,Y)
#define dcache_wbinval(X,Y) dcache_inval(X,Y)
#endif /* __SYS_IP4_H__ */